Key Skills and Qualification:
- Experience with schematic-driven layout, floor planning, chip level routing, DFM and design rule and connectivity verification is preferred
- Design top quality complex layout for high speed analog mixed signal circuits from sub-blocks to top-level integration
- Run a complete set of design verifications
- Review and analysing floor plans and complex circuits with circuit designer
- Collaborate with the circuit design teams to constantly optimize layout implementation for better power, performance and area, as well as planning on work schedule.
- Responsible for in-house IP/library developments
- Degree in Electrical/Electronics/Computer Engineering or relevant
- 5 years of analog custom IC physical design experience
- Strong debug capabilities with parasitic extraction, LVS/DRC and other Physical verification checks
- Familiarity with circuit design concepts, flow and IC manufacturing processes
Selina Lim Siew Yen
Personnel Reg No: R1333126
EA Licence No: 02C3423
We regret that only shortlisted candidates will be notified
Selina Lim Siew Yen EA License No.: 02C3423 Personnel Registration No.: R1333126
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